From lurker-index@localhost Tue Jun 24 15:00:23 2008 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.1.7-deb (2006-10-05) on mail.terpstra.ca X-Spam-Level: X-Spam-Status: No, score=-2.4 required=5.0 tests=AWL,BAYES_00, FORGED_RCVD_HELO autolearn=ham version=3.1.7-deb X-Original-To: wesley@terpstra.ca Delivered-To: wesley@terpstra.ca Received: from mail.terpstra.ca (localhost [127.0.0.1]) by mail.terpstra.ca (Postfix) with ESMTP id 0BD5C80003 for ; Tue, 24 Jun 2008 15:00:19 +0200 (CEST) Received: from mlton.org (mail.sweeks.com [69.55.226.86]) by mail.terpstra.ca (Postfix) with ESMTP id C63A180001 for ; Tue, 24 Jun 2008 15:00:08 +0200 (CEST) Received: from localhost.johncompanies.com ([127.0.0.1] helo=mlton.org) by mlton.org with esmtp (Exim 4.50) id 1KB87l-0005IL-Nv; Tue, 24 Jun 2008 05:59:53 -0700 Received: from nagoya.uchicago.edu ([128.135.191.165]) by mlton.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA:32) (Exim 4.50) id 1KB87b-0005H4-VP for mlton@mlton.org; Tue, 24 Jun 2008 05:59:44 -0700 Received: from nagoya.uchicago.edu (localhost.localdomain [127.0.0.1]) by nagoya.uchicago.edu (8.12.8/8.12.8) with ESMTP id m5ODsx0W024400; Tue, 24 Jun 2008 08:54:59 -0500 Received: from localhost (fluet@localhost) by nagoya.uchicago.edu (8.12.8/8.12.8/Submit) with ESMTP id m5ODswqD024396; Tue, 24 Jun 2008 08:54:59 -0500 X-Authentication-Warning: nagoya.uchicago.edu: fluet owned process doing -bs Date: Tue, 24 Jun 2008 08:54:58 -0500 (CDT) From: Matthew Fluet X-X-Sender: fluet@nagoya.uchicago.edu To: Nicolas Bertolotti Subject: RE: [MLton] MLton on MinGW/win64: regression ok(ish)! In-Reply-To: <8320D98DA9A5C54C926D397795FE7CEA28767C6478@EXCHANGE-UK.ad.mathworks.com> Message-ID: References: <05A5D507-7A3B-4BBE-8C3B-C642109E51FB@terpstra.ca> <8320D98DA9A5C54C926D397795FE7CEA28767C6478@EXCHANGE-UK.ad.mathworks.com> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Cc: "Wesley W. Terpstra" , MLton developers X-BeenThere: mlton@mlton.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: mlton.mlton.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: mlton-bounces@mlton.org Errors-To: mlton-bounces@mlton.org On Mon, 16 Jun 2008, Nicolas Bertolotti wrote: >> I tried to add an 'ms_abi' toggle in the amd64 codegen, but couldn't >> figure out where to add instructions for pushing/popping the "shadow >> space" (32 bytes) as required. I'd appreciate some help here, >> Matthew. :-) At the moment I only have it working with the C codegen. >> I'm hoping that using gcc only as an assembler will make the floating >> point and ICE regressions go away. > > I am unfortunately unable to answer it ... and hope someone can. /mlton/codegen/amd64-codegen/amd64-generate-transfers.fun:1348 has code to round the C-stack to a 16byte alignment. You could probably follow that code by something like: val (setup_args, size_stack_args) = if convention = CFunction.Convention.MSx64 then (AppendList.append (setup_args, AppendList.single (Assembly.instruction_binal {oper = Instruction.SUB, dst = c_stackP, src = Operand.immediate_int 32, size = pointerSize})), size_stack_args + 32) else (setup_args, size_stack_args) You might also need to adjust the fixCStack instructions (/mlton/codegen/amd64-codegen/amd64-generate-transfers.fun:1554) if the MSx64 ABI requires the caller to pop the C stack. The portion of Wesley's patch that adjusts the argument registers depending on the ABI wasn't committed, so you would need to add that as well. _______________________________________________ MLton mailing list MLton@mlton.org http://mlton.org/mailman/listinfo/mlton